Research Article

Notes on “A Novel Conversion Scheme from a Redundant Binary Number to Two's Complement Binary Number for Parallel Architectures” proposed by Choo et.al.

by  M S Chakraborty, T Ghosh, A C Mondal
journal cover
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 103 - Issue 5
Published: October 2014
Authors: M S Chakraborty, T Ghosh, A C Mondal
10.5120/18068-9009
PDF

M S Chakraborty, T Ghosh, A C Mondal . Notes on “A Novel Conversion Scheme from a Redundant Binary Number to Two's Complement Binary Number for Parallel Architectures” proposed by Choo et.al.. International Journal of Computer Applications. 103, 5 (October 2014), 5-7. DOI=10.5120/18068-9009

                        @article{ 10.5120/18068-9009,
                        author  = { M S Chakraborty,T Ghosh,A C Mondal },
                        title   = { Notes on “A Novel Conversion Scheme from a Redundant Binary Number to Two's Complement Binary Number for Parallel Architectures” proposed by Choo et.al. },
                        journal = { International Journal of Computer Applications },
                        year    = { 2014 },
                        volume  = { 103 },
                        number  = { 5 },
                        pages   = { 5-7 },
                        doi     = { 10.5120/18068-9009 },
                        publisher = { Foundation of Computer Science (FCS), NY, USA }
                        }
                        %0 Journal Article
                        %D 2014
                        %A M S Chakraborty
                        %A T Ghosh
                        %A A C Mondal
                        %T Notes on “A Novel Conversion Scheme from a Redundant Binary Number to Two's Complement Binary Number for Parallel Architectures” proposed by Choo et.al.%T 
                        %J International Journal of Computer Applications
                        %V 103
                        %N 5
                        %P 5-7
                        %R 10.5120/18068-9009
                        %I Foundation of Computer Science (FCS), NY, USA
Abstract

In this article, it is shown that although the reverse conversion scheme for binary signed-digit number system proposed by Choo et. al. can not support full parallelism; the rules on which it is based are correct. In this connection, a mathematical induction technique is used to validate the decomposition rules. Accordingly, it can be inferred that the reverse conversion scheme for binary signed-digit number system proposed by Veeramachaneni et. al. works correctly and performs reverse conversion in ? (log n) time, where, n is the input size. As a consequence, the scheme by Veeramachaneni et. al. need to be considered as a potential contender of the more recent schemes for the same.

References
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Index Terms
Computer Science
Information Sciences
No index terms available.
Keywords

Reverse conversion scheme binary signed-digit number system parallelism validation comparative study.

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