|
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
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| Volume 170 - Issue 8 |
| Published: Jul 2017 |
| Authors: N. Ramanjaneyulu, D. Satyanarayana, K. Satya Prasad |
10.5120/ijca2017914932
|
N. Ramanjaneyulu, D. Satyanarayana, K. Satya Prasad . Design of a Three Stage Ring VCO in 0.18 µm CMOS under PVT Variations. International Journal of Computer Applications. 170, 8 (Jul 2017), 35-39. DOI=10.5120/ijca2017914932
@article{ 10.5120/ijca2017914932,
author = { N. Ramanjaneyulu,D. Satyanarayana,K. Satya Prasad },
title = { Design of a Three Stage Ring VCO in 0.18 µm CMOS under PVT Variations },
journal = { International Journal of Computer Applications },
year = { 2017 },
volume = { 170 },
number = { 8 },
pages = { 35-39 },
doi = { 10.5120/ijca2017914932 },
publisher = { Foundation of Computer Science (FCS), NY, USA }
}
%0 Journal Article
%D 2017
%A N. Ramanjaneyulu
%A D. Satyanarayana
%A K. Satya Prasad
%T Design of a Three Stage Ring VCO in 0.18 µm CMOS under PVT Variations%T
%J International Journal of Computer Applications
%V 170
%N 8
%P 35-39
%R 10.5120/ijca2017914932
%I Foundation of Computer Science (FCS), NY, USA
This paper describes the design of a 3.4 GHz three stage Ring Voltage Controlled Oscillator (VCO). In order to achieve wide tuning range at gega hertz frequencies a three stage ring oscillator based VCO is designed using differential delay cell. The linearity is achieved over a wide-tuning range from 1.5 GHz to 3.8 GHz while maintain the phase noise -116 dBc/Hz at 3.4GHz.The designed VCO is simulated using Cadence 0.18-µm CMOS process and VCO consumes 8.58 mA current and 15.4mW power from a 1.8V power supply. The designed VCO is generating a frequency of 3.4 GHz over a temperature range from 0o C to 65o C. The VCO has been found to work for all Process (Typical, Slow and Fast corners), Voltage and Temperature (PVT) conditions.