Abstract

This paper describes the design of a low-power CMOS based current-frequency (I–F) Analog–Digital Converter. This ADC is designed for blood-glucose monitoring. This current-frequency ADC uses nA-range input currents to set and compare voltage oscillations against a self-produced reference to resolve 0–32nA with an accuracy of 5-bits at a sampling rate of 225MHz. The comparator used is dynamic latched comparator and the 5-bit counter and 5 bit latch is used to fetching the output in parallel form. This is designed in a 0. 6?m CMOS technology supplied at 1. 8V; it operates for a range of 0. 0- 1. 8V input voltage with power consumption below 1. 1?w using Cadence tools.

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