Research Article
High Performance and Function Design on the Transistor Level
|
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
|
| Volume 78 - Issue 10 |
| Published: September 2013 |
| Authors: Tripti Sharma, K. G. Sharma |
10.5120/13528-1259
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Tripti Sharma, K. G. Sharma . High Performance and Function Design on the Transistor Level. International Journal of Computer Applications. 78, 10 (September 2013), 33-35. DOI=10.5120/13528-1259
@article{ 10.5120/13528-1259,
author = { Tripti Sharma,K. G. Sharma },
title = { High Performance and Function Design on the Transistor Level },
journal = { International Journal of Computer Applications },
year = { 2013 },
volume = { 78 },
number = { 10 },
pages = { 33-35 },
doi = { 10.5120/13528-1259 },
publisher = { Foundation of Computer Science (FCS), NY, USA }
}
%0 Journal Article
%D 2013
%A Tripti Sharma
%A K. G. Sharma
%T High Performance and Function Design on the Transistor Level%T
%J International Journal of Computer Applications
%V 78
%N 10
%P 33-35
%R 10.5120/13528-1259
%I Foundation of Computer Science (FCS), NY, USA
Abstract
This paper proposes a new design of pass transistor logic based 2T AND gate. Performance comparison of proposed gate with traditional CMOS, complementary pass-transistor logic design and GDI techniques is presented. Different methods have been compared with respect to the number of devices, power-delay product, temperature sustainability and noise immunity in order to prove the superiority of proposed design over existing ones. The simulation has been carried out on Tanner EDA tool on BSIM3v3 90nm technology.
References
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